Embedded software engineer interview questions, with worked answers

Fourteen questions that embedded software interviews keep coming back to, from junior engineers up to senior embedded software engineer, lead embedded software engineer, embedded systems architect and head of embedded software. For each one: what the interviewer is checking, a short answer, the full answer in plain words, a weak answer to avoid and a likely follow-up.

Contents
  1. How to use these questions
  2. What an embedded software engineer is expected to know
  3. Real time, interrupts and concurrency
  4. Memory, hardware and buses
  5. Power, updates and faults
  6. Testing, safety and security
  7. Lead embedded software engineer, embedded systems architect and head of embedded software
  8. Your CV for these questions
  9. Key takeaways
  10. Frequently asked questions
  11. More on the embedded software engineer role

How to use these questions

Learn the short answer, then attach a device you worked on: the processor, the fault, the tool you measured it with, what fixed it. Embedded interviewers trust a debugging story with an oscilloscope trace more than a list of features you know.

What an embedded software engineer is expected to know

  • Languages: C to a high level, C++Asked in 76% of embedded software engineer ads (as of 5 Nov 2026).Modern C++ for small devices: no surprise memory use, careful with exceptions and templates, clear ownership of every buffer. for larger firmware, PythonAsked in 22% of embedded software engineer ads (as of 5 Nov 2026).Scripts for tests, flashing, log parsing and test rigs; rarely on the device itself. for tests and tools, and an idea of where RustAsked in 2% of embedded software engineer ads (as of 5 Nov 2026).A newer choice for memory-safe firmware; a plus in some ads, still rare in safety-certified products. fits.
  • Real time: interrupts, scheduling, priorities and timing, with or without a real-time operating system such as FreeRTOS or Zephyr.
  • Hardware: reading a datasheet and a schematic, busesAsked in 20% of embedded software engineer ads (as of 5 Nov 2026).Bus and network protocols: CAN, SPI, I2C, UART, Ethernet and wireless links, and how to read them on a scope. such as SPI, I2C, UART and CAN, and measuring with an oscilloscope, a logic analyser and a JTAG debugger.
  • Quality: tests off the targetAsked in 8% of embedded software engineer ads (as of 5 Nov 2026).Tests of the logic on the build machine, with the hardware replaced by stand-ins, run on every change., hardware-in-the-loop tests, static analysis and coding guidelines, and a pipelineAsked in 16% of embedded software engineer ads (as of 5 Nov 2026).Every change built for the target, run through static analysis and tests, ideally on real hardware too. that builds for the target.
  • Products: low power, safe updates in the field, device securityAsked in 9% of embedded software engineer ads (as of 5 Nov 2026).Secure boot, signed updates, no default passwords, and a plan for fixing flaws after the product ships. and, where needed, functional safety.

Real time, interrupts and concurrency

What makes software real-time, and when do you need a real-time operating system?

What they check: that you know real-time means on time, every time, not fast.

Short answer: "Real-time software must react within a fixed deadline; a late answer is a wrong answer. A simple device can run in one main loop with interrupts. When several jobs with different deadlines must share the processor, a real-time operating system, an RTOS, schedules them by priority, so the urgent task always runs first."

The full answer: Hard real-time means a missed deadline is a failure, as in airbag or motor control; soft real-time means a missed deadline only lowers quality, as in audio. An RTOS such as FreeRTOS or Zephyr gives tasks, priorities, queues and timers with known timing; the price is memory and new kinds of bugs between tasks. Measure the worst case, not the average: toggle a pin at the start and end of a task and watch it on an oscilloscope.

A weak answer: "Real-time means the code is very fast." Follow-up: "Your control loop must run every millisecond, and a logging task sometimes delays it." Give the loop a higher priority, move the slow logging out of its way, and measure the jitter afterwards.

What should an interrupt handler do, and what must it never do?

What they check: short handlers, and safe hand-over of data to the rest of the program.

Short answer: "An interrupt handler should be short: read the hardware, store the data, clear the flag, and signal a task or the main loop to do the rest. It must never wait, block on a lock, allocate memory or print to a slow port, because everything else waits while it runs."

The full answer: Data shared between a handler and the main code needs care: the compiler must know the value can change at any time, and a value wider than the processor can read at once must be read with interrupts briefly off or through a safe buffer. Interrupt priorities decide which handler may interrupt another. Long handlers show up as missed messages on a bus or jitter in a control loop, so measure how long each one takes.

A weak answer: "I do all the processing in the interrupt so nothing is missed." Follow-up: "UART bytes go missing at high speed." Use the DMA or a ring buffer, keep the handler short, and check the priorities.

Two tasks share data, and the device locks up about once a week. How do you find the concurrency bug?

What they check: a method for rare faults, and knowledge of races, deadlocks and priority inversion.

Short answer: "I make it happen more often: more load, shorter timeouts, many units on a test rack. I add cheap tracing, such as timestamps in a ring buffer, and let the watchdog save the trace before the reset. Then I look for shared data without protection, locks taken in different orders, or a low-priority task holding a lock a high-priority task needs."

The full answer: Classic faults are a race on shared data, a deadlock between two locks, and priority inversion, which an RTOS mutex with priority inheritance avoids. Trace tools for the RTOS show which task ran when. Fix the design, not the symptom: one owner for each piece of data and messages through queues remove many locks. Keep the fix running on the rack for longer than the old failure interval before calling it done.

A weak answer: "I add a delay and it goes away." Follow-up: "It only happens in the field, never on the bench." Collect crash data from devices, compare field conditions such as temperature and network, and reproduce them.

Memory, hardware and buses

How do you manage memory on a small microcontroller with no room for mistakes?

What they check: that you plan memory up front and know where it can run out.

Short answer: "I avoid allocating memory at run time after start-up, so it cannot fragment or run out later. Buffers are fixed and sized for the worst case. I check the map file for flash and RAM use, give every task a stack with a margin, and measure the real stack use with a fill pattern."

The full answer: Stack overflow is the classic silent fault: it overwrites other data and shows up somewhere else. A memory protection unit can catch it at once. In C++Asked in 76% of embedded software engineer ads (as of 5 Nov 2026).Modern C++ for small devices: no surprise memory use, careful with exceptions and templates, clear ownership of every buffer., features that allocate or throw are often switched off or used with care. Keep constants in flash, watch what libraries pull in, and track memory use in the pipeline so a change that eats the last free RAM is caught before release.

A weak answer: "The chip has plenty of RAM." Follow-up: "After a new feature the device resets at random." Check the stacks' high-water marks and the map file first.

You get a new board from the hardware team. How do you bring it up, starting from the datasheet?

What they check: a step-by-step way of working with hardware, and team work with hardware engineers.

Short answer: "I start small: power and clocks, then a blinking pin and a serial port for messages, then one peripheral at a time, checked against the datasheet and the schematic. Each step is measured with the oscilloscope or logic analyser before I trust it, and I note every board fault for the hardware team."

The full answer: The datasheet and the reference manual give the registers, timings and errata; read the errata first, because known chip faults save days. Check the debugger connection, JTAG or SWD, then the clock tree, then memory, then each bus. Write small test programs that the production test can later reuse. When something fails, decide with the hardware engineer whether it is the board or the code by measuring, not by arguing.

A weak answer: "I load the full firmware and see what works." Follow-up: "The processor does not start at all." Check power, reset and clock with the scope, then the debugger connection.

A sensor on the SPI bus returns rubbish. How do you debug it?

What they check: that you can read a bus on the bench and match it to the datasheet.

Short answer: "I put a logic analyser on the bus and decode it: is the clock there, is chip select active, which mode and speed are used, what bytes go out and come back. Then I compare every detail with the sensor's datasheet: clock polarity and phase, bit order, timing, the command format."

The full answer: Wrong mode, a too-fast clock, a missing pause after chip select or a shared bus where another device answers are the usual causes. I2C has its own: pull-up resistors, addresses and a device that holds the line low. UART needs matching speed and settings; CAN bus needs termination and the right bit timing. Always ask whether the bus is a problem of software, wiring or signal quality, and look at the signal on an oscilloscope if the decoded bytes look random.

A weak answer: "I try different settings until it works." Follow-up: "It works on the bench and fails in the housing." Look at signal quality, cable length and noise on the scope.

Power, updates and faults

How do you design firmware for low power on a device that must run for years on a battery?

What they check: that you measure current and design the device to sleep.

Short answer: "The device sleeps in the deepest mode it can and wakes only for work, by timer or by interrupt. I switch off unused peripherals and clocks, batch radio traffic, and measure the current over a full day's cycle with a power analyser, because one forgotten pull-up or a radio that wakes too often ruins the battery life."

The full answer: Build a power budget: current in each state times the time spent there. Radio and sensors usually dominate, so send less often and less data. A real-time operating system can enter sleep when no task is ready. Check sleep current on the finished board, not the evaluation kit, and repeat after each firmware change.

A weak answer: "We use a bigger battery." Follow-up: "Battery life is a third of the plan." Measure the profile, find what never sleeps, and check the radio settings.

How do you update firmware in the field, over the air, without bricking devices?

What they check: a safe update design with a way back.

Short answer: "A small bootloader that never changes in the field checks and starts the application. A new image is downloaded into a second slot, its signature is checked, and the bootloader switches to it only then. If the new version does not confirm it runs well, the bootloader rolls back. Updates go out in waves, watching for failures."

The full answer: Over-the-air updates need a signed image, so only your firmware runs; a version check, so old flawed versions cannot be loaded again; and enough flash for two images or a careful scheme with less. Power loss during an update must leave a working device. Many teams use an existing secure bootloader rather than writing their own. Keep the update path tested in the pipeline, because a broken updater cannot be fixed by an update.

A weak answer: "We overwrite the flash with the new version." Follow-up: "Power fails halfway through." Show how the two slots and the rollback keep the device alive.

What does a watchdog do, and how do you recover from a fault in the field?

What they check: that you design for faults and learn from them.

Short answer: "A watchdog is a hardware timer that resets the device if the software stops feeding it in time. I feed it only when every important task has shown it is alive, not from a timer interrupt, so a stuck task causes a reset. Before the reset, the device saves the cause, such as the task and the last state, to report later."

The full answer: A reset is a last resort, not a fix: the device must come back to a safe state, and the team must find out why. Store reset reasons and fault records in memory that survives the reset, and send them home with the next connection. Count resets per version; a rise after a release is a reason to stop the rollout. In safety products the watchdog is part of the safety concept and is tested like any other function.

A weak answer: "I feed the watchdog in the timer interrupt so it never resets." Follow-up: "Devices in the field reset once a day." Collect the stored reasons and look for the task that stops feeding.

Testing, safety and security

How do you test embedded software when the hardware is late or scarce?

What they check: layers of testing that start before the board exists.

Short answer: "I keep logic apart from hardware access, so most of it runs as unit testsAsked in 8% of embedded software engineer ads (as of 5 Nov 2026).Tests of the logic on the build machine, with the hardware replaced by stand-ins, run on every change. on the build machine, with stand-ins for the hardware. Static analysis runs on every change. On real hardware, a hardware-in-the-loop rig feeds the device simulated signals and checks its outputs automatically, and a few boards run long tests overnight."

The full answer: Hardware-in-the-loop testing puts the real controller in a loop with a simulated world: a model of the motor, the car or the patient sends signals and reads the answers. test-driven developmentAsked in 2% of embedded software engineer ads (as of 5 Nov 2026).Write the test before the code; it works well for drivers and protocol logic kept apart from the hardware. suits drivers and protocol code. Static analysis tools and coding rules such as MISRA C find whole classes of faults before any test runs. The pipelineAsked in 16% of embedded software engineer ads (as of 5 Nov 2026).Every change built for the target, run through static analysis and tests, ideally on real hardware too. builds for the target, runs the tests and flashes a board on the rack.

A weak answer: "We test when the prototype arrives." Follow-up: "The rig is busy every night." Move more tests off the target and run the rig only for what needs real hardware.

What changes when your software must meet an international functional safety standard such as IEC 61508 or ISO 26262?

What they check: that you understand safety as a process with evidence, not only careful code.

Short answer: "The international standard IEC 61508, and ISO 26262, its international version for road vehicles, start from a hazard analysis that sets how much risk reduction each function needs, a safety integrity level, or ASIL in cars. The level decides how strict the process is: traced requirements, reviews, coding rules, test coverage and independent checks. Every step leaves evidence for the safety case."

The full answer: A safety integrity level, SIL in IEC 61508 and ASIL in ISO 26262, both international standards, sets the methods: higher levels ask for more formal design, more test depth and more independence. Medical device software follows the international standard IEC 62304, with classes by risk. The work is assessed by an independent assessor for the product; engineers need to know the method, and some take a course with an exam to learn it. Tool qualification, change control and traceability matter as much as the code itself.

A weak answer: "We just test more." Follow-up: "A requirement changes late in the project." Show the impact analysis, the updated trace and which tests and reviews must be repeated.

How do you build security into a connected device?

What they check: security designed into the device and its whole life.

Short answer: "Secure boot so only signed firmware runs, signed updates, no default passwords, debug ports locked in production, keys kept in protected hardware, encrypted communication, and a way to ship fixes for flaws found after release."

The full answer: Start with a threat model: who could attack the device, how, and what they would gain. IEC 62443 is the international series for industrial security. In the EU, the Cyber Resilience Act adds duties for products with digital parts sold in the EU, such as handling vulnerabilities and providing security updates for a support period. Other countries have their own rules, so check where the product is sold.

A weak answer: "Nobody will attack our small device." Follow-up: "A researcher reports a flaw." Confirm it, fix it, ship a signed update, and tell customers what to do.

When would you choose embedded Linux over a microcontroller with an RTOS?

What they check: that you can match the platform to the product's needs.

Short answer: "Embedded LinuxAsked in 41% of embedded software engineer ads (as of 5 Nov 2026).Embedded Linux: build an image, write or adapt a driver, read kernel logs, and keep boot time short. fits when the device needs a rich network stack, a display with a full interface, much memory or many existing libraries, and can live with a longer boot and higher power. A microcontroller with an RTOS fits hard timing, low power, low cost and instant start. Many products use both: Linux for the interface and a microcontroller for the timing."

The full answer: Linux needs a build system for the image, such as Yocto or Buildroot, drivers in the kernel, updates for many packages and a plan for security fixes over the life of the product. A microcontroller needs more of its own code but fewer moving parts. Write down the choice with its reasons: timing, power, cost, team skills and support period.

A weak answer: "Linux, because it has everything." Follow-up: "The product must start in under a second." Explain boot time limits and where a microcontroller would take over.

Lead embedded software engineer, embedded systems architect and head of embedded software

These questions come up for senior embedded software engineer, lead embedded software engineer, embedded systems architect and head of embedded software roles, where the work is the whole product and the teams behind it.

As lead or architect, how do you split a product between hardware, firmware and the cloud?

What they check: system thinking and trade-offs you can explain to every team.

Short answer: "I start from the product's needs: timing, power, cost, safety and how it is updated and supported. Hard timing and safety go close to the hardware; heavy computing and data that changes often go to a stronger processor or the cloud. I write down the interfaces between the parts early, agree them with each team, and keep a list of decisions and their reasons."

The full answer: Each choice moves cost and risk: a cheaper chip saves money on every unit but costs engineering time; logic in the cloud is easy to change but fails without a connection. The architect keeps the system safe and testable as a whole, plans the update path and the support period, and talks with purchasing about parts that may become hard to get. A head of embedded software also plans people, tools and budgets across products.

A weak answer: "Hardware decides, then we write the software." Follow-up: "The chosen chip is out of stock for a year." Show how a layer between hardware and logic makes a change of chip possible.

Your CV for these questions

Interviewers will pick a device from your CV and ask how it worked and what went wrong. Write lines that open such a story, each under the job where it happened:

SkillWeak lineStrong line, with proof
RTOS firmwareAsked in 76% of embedded software engineer ads (as of 5 Nov 2026).Modern C++ for small devices: no surprise memory use, careful with exceptions and templates, clear ownership of every buffer.Experience with RTOS.Split a single-loop controller into six FreeRTOS tasks with queues; worst-case response fell from 8 to 1 millisecond.
CAN busAsked in 20% of embedded software engineer ads (as of 5 Nov 2026).Bus and network protocols: CAN, SPI, I2C, UART, Ethernet and wireless links, and how to read them on a scope.Knowledge of CAN.Wrote the CAN stack and diagnostics for a battery management unit; passed the customer's bus tests at first attempt.
Test rigAsked in 8% of embedded software engineer ads (as of 5 Nov 2026).Tests of the logic on the build machine, with the hardware replaced by stand-ins, run on every change.Testing of embedded software.Built a hardware-in-the-loop rig in Python that runs 300 checks each night; field returns for firmware faults halved.
Secure bootAsked in 9% of embedded software engineer ads (as of 5 Nov 2026).Secure boot, signed updates, no default passwords, and a plan for fixing flaws after the product ships.Implemented security features.Added secure boot and signed updates to a gateway family; closed every finding of the external penetration test.
Bring-upHardware bring-up.Brought up three new boards with the hardware team; found a clock fault in rev A that saved a re-spin.

Score your CV against a real embedded job before the interview; each gap it finds is a question to prepare an answer for.

Key takeaways

  • Real-time means a deadline met every time; measure the worst case on the bench.
  • Keep interrupt handlers short and data hand-over safe; most rare faults live there.
  • Plan memory, power and updates from the start; each one fails late and expensively.
  • Safety standards such as the international IEC 61508 and ISO 26262 are a process with evidence, not careful code alone.
  • Senior roles add the split between hardware, firmware and cloud, and the teams behind it.

Frequently asked questions

What do embedded software interviews ask most?
Interrupts and real time, concurrency, memory, buses and bring-up, low power, field updates, testing, safety and security, plus a debugging story of your own.
Is there a coding test?
Often a C question on paper or a screen, such as a ring buffer or a bit operation explained in words, plus a design discussion.
Do I need to know electronics?
Enough to read a schematic and a datasheet, measure with an oscilloscope and talk with hardware engineers on equal terms.
Which tools come up?
A JTAG or SWD debugger, an oscilloscope, a logic analyser, FreeRTOS or Zephyr, Yocto for embedded Linux, Git and a build pipeline.
How should I prepare in a week?
Write down your hardest bug as a story, review interrupts, memory and one bus in detail, and read the basics of the safety standard of your target industry.